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INAOE | Electrónica | Directorio | Investigadores | Esteban Tlelo Cuautle
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Dr. Esteban Tlelo Cuautle

Correo: etlelo@inaoep.mx

Extensión: 1404

Información Curricular:

Doctorado obtenido en: INAOE, en 2000.
Título de Tesis: "Desarrollo de un Método de Polarización para Circuitos Analógicos

Maestría en Ciencias obtenido en: INAOE, en 1995.

Licenciatura: Instituto Tecnológico de Puebla, en 1993.

Líneas de Investigación:

Diseño de Circuitos integrados

Proyectos:

CONACyT 131839: "Optimization of nonlinear dynamical circuits by applying evolutionary algorithms", 2011 – 2014.

UC MEXUS-CONACYT CN-11-575: “Symbolic and Statistical Modeling and Analysis Techniques for Analog/Mixed-Signal Nanometer Integrated Circuits”, August 2011 - February 2013. In Collaboration with Dr. Sheldon X.-D. Tan, University of California at Riverside (UCR).

Tesis:

Design of multi-scroll chaotic oscillators, INAOE, Rodolfo Trejo Guerra, January 16, 2012. Co-Advisor Dr. César Cruz Hernández (CICESE, México).

Síntesis automática de circuitos analógicos usando algoritmos evolutivos, INAOE, Miguel Aurelio Duarte Villaseñor, December 10, 2010.

Synthesis of chaotic oscillators by applying behavioral modeling, INAOE, Dr. Jesús Manuel Muñoz Pacheco, August 14, 2009.

 

LIBROS

 

M. Fakhfakh, E. Tlelo-Cuautle, R. Castro-López, Analog/RF and Mixed-Signal Circuit Systematic Design, Springer, December 2012

E. Tlelo-Cuautle, Integrated Circuits for Analog Signal Processing, Springer, ISBN: 978-1-4614-1382-0, July 2012. http://www.springer.com/engineering/circuits+%26+systems/book/978-1-4614-1382-0

M. Fakhfakh, E. Tlelo-Cuautle, F.V. Fernández, Design of Analog Circuits through Symbolic Analysis, Bentham Sciences Publishers Ltd., eISBN: 9078-1-60805-095-6, May 2012.

E. Tlelo-Cuautle, S. X.-D. Tan, VLSI Design, InTech Publisher, ISBN: 978-953-308-455-8, February 2012. http://www.intechweb.org/welcome/c59a927a7019ac531e7ee1663e732657

E. Tlelo-Cuautle, Analog Circuits: Applications, Design and Performance, NOVA Science Publishers, Inc., ISBN: 978-1-61324-355-8, February 2012. https://www.novapublishers.com/catalog/product_info.php?products_id=23737

E. Tlelo-Cuautle, Advances in Analog Circuits, InTech Publisher, ISBN: 978-953-307-323-1, 368 pages, February 2011. Open Access http://www.intechweb.org/books/show/title/advances-in-analog-circuits

E. Tlelo-Cuautle, Chaotic Systems, InTech Publisher, ISBN: 978-953-307-564-8, 310 pages, February 2011. Open Access http://www.intechweb.org/books/show/title/chaotic-systems

J.M. Muñoz-Pacheco, E. Tlelo-Cuautle, Electronic design automation of multi-scroll chaos generators, Bentham Sciences Publishers Ltd., eISBN: 978-1-60805-165-6, 96 pages, 2010. doi:10.2174/97816080516561100101
http://www.benthamscience.com/ebooks/9781608051656/index.htm

Publicaciones Recientes:

R. Trejo-Guerra, E. Tlelo-Cuautle, J.M. Jiménez-Fuentes, J.M. Muñoz-Pacheco, C. Sánchez-López, Multiscroll Floating Gate Based Integrated Chaotic Oscillator, International Journal of Circuit Theory and Applications, 2012. DOI: 10.1002/cta.821
http://onlinelibrary.wiley.com/doi/10.1002/cta.821/full

M.A. Duarte-Villaseñor, E. Tlelo-Cuautle, L. Gerardo de la Fraga, Binary genetic encoding for the synthesis of mixed-mode circuit topologies, Circuits, Systems and Signal Processing, 2012. DOI: 10.1007/s00034-011-9353-2
http://www.springerlink.com/content/e012h26713047l10/

Zhigang Hao, Sheldon X.-D. Tan, E. Tlelo-Cuautle, Jacob Relles, Chao Hu, Wenjian Yu, Yici Cai, Guoyong Shi, Statistical Extraction and Modeling of Inductance Considering Spatial Correlation, Analog Integrated Circuits and Signal Processing, 2012. DOI 10.1007/s10470-011-9720-8

S. Polanco-Martagón, G. Reyes-Salgado, G. Flores-Becerra, I. Guerra-Gómez, E. Tlelo-Cuautle, L. Gerardo de la Fraga, M.A. Duarte-Villaseñor, Selection of MOSFET Sizes by Fuzzy Sets Intersection in the Feasible Solutions Space, Journal of Applied Research and Technology, 2012. http://cibernetica.ccadet.unam.mx/jart/

C. Sánchez-López, F.V. Fernández, E. Tlelo-Cuautle, S. X.-D. Tan, Pathological Element-Based Active Device Models and Their Application to Symbolic Analysis, IEEE Transactions on Circuits and Systems I: Regular papers, vol. 58, no. 6, pp. 1382-1395, , June 2011. DOI: 10.1109/TCSI.2010.2097696
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=5685596



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Última modificación :
09-01-2012 a las 14:26 por Webmaster

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