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INAOE | Electrónica | Directorio | Investigadores | Esteban Tlelo Cuautle
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Dr. Esteban Tlelo Cuautle

SNI NIVEL 2

Correo Electrónico: etlelo@inaoep.mx

Teléfono: +52 222 266 31 00 ext. 1404

Oficina: 1404

 

 

Información Curricular 

Doctorado obtenido en: INAOE, en 2000.
Título de Tesis: "Desarrollo de un Método de Polarización para Circuitos Integrados Analógicos


Maestría en Ciencias obtenido en: INAOE, en 1995.

Licenciatura: Instituto Tecnológico de Puebla, en 1993.

 

Líneas de investigación

  • Síntesis y diseño automatizado de circuitos integrados.

  • Diseño y aplicaciones de sistemas caóticos integrados.

  • Optimización con Heurísticas y análisis simbólico.

 

PROYECTOS

  • CONACyT237991: "New optimization methodologies of integrated circuits oriented to the design of chaotic dynamical systems with application to the biomedical area", 2015-2018.

 

últimas TEsIS dirigidas

Sistema reconfigurables para predicción de series de tiempo caóticas,  INAOE, Ana Dalia Pano Azucena.

 

Implementación electrónica de sistemas dinámicos de orden fraccional y su óptimización aplicando metaheurísticas, INAOE, Alejandro Silva Juárez

 

LIBROS

[B14] E. Tlelo-Cuautle, M. Fakhfakh, L. Gerardo de la Fraga, Analog Circuits: Fundamentals, Synthesis and Performance, NOVA Science Publishers, Inc., ISBN: 978-1-53610-969-6, pages, 2017.

[B13] Esteban Tlelo-Cuautle, Luis Gerardo de la Fraga, José de Jesús Rangel Magdaleno, Engineering Applications of FPGAs: Chaotic Systems, Artificial Neural Networks, Random Number Generators, and Secure Communication Systems, Springer, ISBN: 978-3-319-34113-2, eISBN: 978-3-319-34115-6, 230 pages, 2016. DOI: 10.1007/978-3-319-34115-6

[B12] M. Fakhfakh, E. Tlelo-Cuautle, P. Siarry, ComputationalIntelligence in Digital and Network Designs and Applications, Springer International Publishing Switzerland, eISBN: 978-3-319-20071-2, ISBN: 978-3-319-20070-5, 2015.

[B11] M. Fakhfakh, E. Tlelo-Cuautle, P. Siarry, ComputationalIntelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) CircuitDesign, Springer International Publishing Switzerland, eISBN: 978-3-319-19872-9, ISBN:978-3-319-19871-2, 2015.

[B10] M. Fakhfakh, E. Tlelo-Cuautle, M.H. Fino, Performance Optimization Techniques in Analog, Mixed-Signal, and Radio-Frequency Circuit Design, Advances in Computer and Electrical Engineering (ACEE) Book Series, IGI Global, 2014. DOI: 10.4018/978-1-4666-6627-6, ISBN13: 9781466666276, ISBN10: 1466666277, EISBN13: 9781466666283

[B9] G. Shi, S. X.-D. Tan, E. Tlelo-Cuautle, Advanced Symbolic Analysis for VLSI Systems-Methods and Applications, Springer,  ISBN: 978-1-4939-1102-8,eISBN: 978-1-4939-1103-5, 300 pages, July 2014. DOI: DOI 10.1007/978-1-4939-1103-5

[B8] M. Fakhfakh, E. Tlelo-Cuautle, R. Castro-López, Analog/RF and Mixed-Signal Circuit Systematic Design, Springer, ISBN: 978-3-642-36328-3, Lecture Notes in Electrical Engineering, Vol. 233, 380 pages, 2013. DOI 10.1007/978-3-642-36329-0

[B7] M. Fakhfakh, E. Tlelo-Cuautle, F.V. Fernández, Design of Analog Circuits through Symbolic Analysis, Bentham Sciences Publishers Ltd., eISBN: 9781-60805-095-6, ISBN: 978-1-60805-425-1, 491 pages, August 2012. DOI: 10.2174/97816080509561120101

[B6] E. Tlelo-Cuautle, Integrated Circuits for Analog Signal Processing, Springer, ISBN: 978-1-4614-1382-0, 321 pages, August 2012.

[B5] E. Tlelo-Cuautle, Analog Circuits: Applications, Design and Performance, NOVA Science Publishers, Inc., ISBN: 978-1-61324-355-8, 279 pages, March 2012.

[B4] E. Tlelo-Cuautle, S. X.-D. Tan, VLSI Design,InTech Publisher, ISBN: 978-953-307-884-7, 290 pages, January 2012.

[B3] E. Tlelo-Cuautle, Advances in Analog Circuits,InTech Publisher, ISBN: 978-953-307-323-1, 368 pages, February 2011.

[B2] E. Tlelo-Cuautle, Chaotic Systems,InTech Publisher, ISBN: 978-953-307-564-8, 310 pages, February 2011.

[B1] J.M. Muñoz-Pacheco, E. Tlelo-Cuautle, Electronic design automation of multi-scroll chaos generators, Bentham Sciences Publishers Ltd., eISBN: 978-1-60805-165-6, 96 pages, 2010. doi:10.2174/97816080516561100101

 

PUBLICACIONES RECIENTES



  • J. Lopez-Arredondo, E. Tlelo-Cuautle, L. G. de la Fraga, High-Q and Wide-Bandwidth Capacitor Multiplier Optimized by NSGA-II, IETE Journal of Research, 2018. DOI: 10.1080/03772063.2018.1436987

  • Jesus M. Munoz-Pacheco, Diana K. Guevara-Flores, Olga Guadalupe Félix-Beltrán, Esteban Tlelo-Cuautle, José E. Barradas-Guevara, Christos Volos, Experimental verification of optimized multi-scroll chaotic oscillators based on irregular saturated functions, Complexity, 2018.

  • J.M. Hernández-Ontiveros, E Inzunza-Gonzalez, E.E. García-Guerrero, O.R. Lopez-Bonilla, S.O. Infante-Prieto, J.R. Cardenas-Valdez, E. Tlelo-Cuautle, Development and implementation of a fish counter by using an embedded system, Computers and Electronics in Agriculture, vol. 145, pp. 53-62, ISSN: 0168-1699, 2018. DOI: 10.1016/j.compag.2017.12.023

  • Luis Gerardo de la Fraga, Esteban Torres-Pérez, Esteban Tlelo-Cuautle, Cuauhtemoc Mancillas-López, Hardware Implementation of pseudo-random number generators based on chaotic maps, Nonlinear Dynamics, vol. 90, no. 3, pp. 1661-1670, ISSN: 0924-090X (Print) 1573-269X (Online), 2017. DOI: 10.1007/s11071-017-3755-z

  • Carlos Muñiz-Montero, Luis V. García-Jiménez, Luis A. Sánchez-Gaspariano, Carlos Sánchez-López, Víctor R. González-Díaz, Esteban Tlelo-Cuautle, New alternatives for analog implementation of fractional order integrators, differentiators and PID controllers based on integer order integrators, Nonlinear Dynamics, vol. 90, no. 1, pp. 241–256, ISSN: 0924-090X (Print) 1573-269X (Online), 2017. DOI: 10.1007/s11071-017-3658-z

 

PÁGINA PRINCIPAL

http://www.researcherid.com/rid/H-3141-2014

 

editor en revistas internacionales

Associate Editor in IEEE Transactions on Circuits and Systems-I: Regular Papers JCR 2016-2019

Associate Editor in Integration – the VLSI Journal JCR 2013-Present

Associate Editor in Metaheuristics 2018-Present

Associate Editor in IEEE Transactions on Circuits and Systems II: Express Briefs JCR 2014-2015

 

International AdvisoryBoardMember: International Group of Control Systems (IGCS)


Última modificación :
18-04-2018 a las 10:44 por Laura Toxqui Olmos

Dirección: Luis Enrique Erro # 1, Tonantzintla, Puebla, México C.P. 72840 | Teléfono: (222) 247. 27.42 | Contacto: mcampos@inaoep.mx | Fax: 247.27.42

 

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